Byteop1P (Quad 8-Bit Average – Byte) - Analog Devices ADSP-BF53x Blackfin Reference

BYTEOP1P (Quad 8-Bit Average – Byte)
General Form
dest_reg = BYTEOP1P ( src_reg_0, src_reg_1 )
dest_reg = BYTEOP1P ( src_reg_0, src_reg_1 ) (T)
dest_reg = BYTEOP1P ( src_reg_0, src_reg_1 ) (R)
dest_reg = BYTEOP1P ( src_reg_0, src_reg_1 ) (T, R)
Syntax
/* forward byte order operands */
Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) ;
Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T) ;
*/
/* reverse byte order operands */
Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (R) ;
Dreg = BYTEOP1P (Dreg_pair, Dreg_pair) (T, R) ; /* truncated (b)
*/
Syntax Terminology
:
Dreg R7–0
:
Dreg_pair R1:0
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Quad 8-Bit Average – Byte instruction computes the arithmetic aver-
age of two unsigned quad byte number sets byte wise, adjusting for byte
alignment. This instruction loads the byte-wise results as concatenated
bytes in one 32-bit destination register, as shown in
Table 18-12.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
, , only
R3:2
Video Pixel Operations
/* (b) */
/* truncated (b)
/* (b) */
Table 18-11 and
18-19