Analog Devices ADSP-BF53x Blackfin Reference page 821

Table C-10. Load / Store Instructions (Sheet 6 of 12)
Instruction
and Version
Load High Data Register Half
Dreg_hi = W [ Ireg – – ]
Load High Data Register Half
Dreg_hi = W [ Preg ]
NOTE: The two least significant bit fields must refer to the same Preg number. Otherwise, this opcode
represents a post-modify version of this instruction.
Load High Data Register Half
Dreg_hi = W [ Preg ++ Preg ]
NOTE: Pointer Preg number cannot be the same as Index Preg number. If so, this opcode represents a
non-post-modify instruction version.
Load Low Data Register Half
Dreg_lo = W [ Ireg ]
Load Low Data Register Half
Dreg_lo = W [ Ireg ++ ]
Load Low Data Register Half
Dreg_lo = W [ Ireg – – ]
Load Low Data Register Half
Dreg_lo = W [ Preg ]
NOTE: Both Pointer Preg # fields must refer to the same Preg number. Otherwise, this opcode represents
a post-modify version of this instruction.
Load Low Data Register Half
Dreg_lo = W [ Preg ++ Preg ]
NOTE: Pointer Preg number cannot be the same as Index Preg number. If so, this opcode represents a
non-post-modify instruction version.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Opcode Range 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0x9CC0— 1 0 0 1 1 1 0 0 1 1 0 Ireg # Dreg #
0x9CDF
0x8400— 1 0 0 0 0 1 0 Dest.
0x85FF
0x8401— 1 0 0 0 0 1 0 Dest.
0x85FE
0x9D20— 1 0 0 1 1 1 0 1 0 0 1 Ireg # Dreg #
0x9D3F
0x9C20— 1 0 0 1 1 1 0 0 0 0 1 Ireg # Dreg #
0x9C3F
0x9CA0— 1 0 0 1 1 1 0 0 1 0 1 Ireg # Dreg #
0x9CBF
0x8200— 1 0 0 0 0 0 1 Dest.
0x83FF
0x8201— 1 0 0 0 0 0 1 Dest.
0x83FE
Instruction Opcodes
Bin
Pointer Pointer
Dreg # Preg # Preg #
Index Pointer
Dreg # Preg # Preg #
Pointer Pointer
Dreg # Preg # Preg #
Index Pointer
Dreg # Preg # Preg #
C-21