Shifter Instruction Summary - Analog Devices ADSP-BF53x Blackfin Reference

Two register arguments are used for these functions. One holds the 32-bit
destination or 32-bit source. The other holds the extract/deposit value, its
length, and its position within the source.

Shifter Instruction Summary

Table 2-11 lists the shifter instructions. For more information about
assembly language syntax and the effect of shifter instructions on the sta-
tus flags, see Chapter 14, "Shift/Rotate Operations."
In Table 2-11, note the meaning of these symbols:
• Dreg denotes any Data Register File register.
• Dreg_lo denotes the lower 16 bits of any Data Register File
register.
• Dreg_hi denotes the upper 16 bits of any Data Register File
register.
• * Indicates the flag may be set or cleared, depending on the results
of the instruction.
• * 0 Indicates versions of the instruction that send results to Accu-
mulator
• * 1 Indicates versions of the instruction that send results to Accu-
mulator
• ** Indicates the flag is cleared.
• *** Indicates
• – Indicates no effect.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
set or clear .
A0 AV0
set or clear .
A1 AV1
contains the latest value shifted into it.
CC
Computational Units
2-53