Analog Devices ADSP-BF53x Blackfin Reference page 525

Add/Subtract – Prescale Up
General Form
dest_reg = src_reg_0 + src_reg_1 (RND12)
dest_reg = src_reg_0 - src_reg_1 (RND12)
Syntax
Dreg_lo_hi = Dreg + Dreg (RND12) ; // (b)
Dreg_lo_hi = Dreg - Dreg (RND12) ; // (b)
Syntax Terminology
:
Dreg R7–0
:
Dreg_lo_hi R7–0.L
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Add/Subtract – Prescale Up instruction combines two 32-bit values
to produce a 16-bit result as follows:
• Prescale up both input operand values by shifting them four places
to the left
• Add or subtract the operands, depending on the instruction version
used
• Round and saturate the upper 16 bits of the result
• Extract the upper 16 bits to the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
,
R7–0.H
Arithmetic Operations
dest_reg
15-13