Register 8-Power-Down Test Register - Analog Devices ADF7021-V Manual

REGISTER 8—POWER-DOWN TEST REGISTER
CR1 COUNTER_RESET
0 NORMAL
1 RESET
RR2 CDR_RESET
0 NORMAL
1 RESET
PD7 PA_ENABLE_Rx_MODE
0 PA OFF
1 PA ON
SW1
0
1
It is not necessary to write to this register under normal
operating conditions.
Rx_RESET
DB15 DB14 DB13 DB12 DB11
CR1 RR2 RR1 PD7 SW1
RR1 DEMOD_RESET
0 NORMAL
1 RESET
Tx/Rx_SWITCH_ENABLE
DEFAULT (ON)
OFF
LE1 LOG_AMP_ENABLE
0 LOG AMP OFF
1 LOG AMP ON
PD6 DEMOD_ENABLE
0 DEMOD OFF
1 DEMOD ON
Figure 70. Register 8—Power-Down Test Register Map
DB10 DB9 DB8 DB7 DB6
LE1 PD6 PD4 PD3
PD5
PD4 FILTER_ENABLE
0 FILTER OFF
1 FILTER ON
PD5 ADC_ENABLE
0 ADC OFF
1 ADC ON
For a combined LNA/PA matching network, Bit DB11 should
always be set to 0, which enables the internal Tx/Rx switch. This
is the power-up default condition.
Rev. 0 | Page 53 of 60
CONTROL
BITS
DB5 DB4 DB3 DB2 DB1
RES PD1 C4 (1) C3 (0) C2 (0) C1 (0)
PD1 SYNTH_ENABLE
0 SYNTH OFF
1 SYNTH ON
PD3 LNA/MIXER_ENABLE
0 LNA/MIXER OFF
1 LNA/MIXER ON
ADF7021-V
DB0