Analog Devices ADSP-BF53x Blackfin Reference page 633

PREFETCH
General Form
PREFETCH
Syntax
PREFETCH [ Preg ] ;
PREFETCH [ Preg ++ ] ;
Syntax Terminology
: , ,
Preg P5–0 SP
Instruction Length
In the syntax, comment (a) identifies 16-bit instruction length.
Functional Description
The Data Cache Prefetch instruction causes the data cache to prefetch the
cache line that is associated with the effective address in the P-register.
The operation causes the line to be fetched if it is not currently in the data
cache and if the address is cacheable (that is, if bit
the line is already in the cache or if the cache is already fetching a line, the
prefetch instruction performs no action, like a
This instruction does not cause address exception violations. If a protec-
tion violation associated with the address occurs, the instruction acts as a
and does not cause a protection violation exception.
NOP
Options
The instruction can post-increment the line pointer by the cache line size.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
/* indexed (a) */
/* indexed, post increment (a) */
FP
Cache Control
CPLB_L1_CHBL
.
NOP
= 1). If
17-3