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Table 15-3. Multiply and Multiply-Accumulate to Accumulator Options
Option
Description
Default
Signed fraction. Multiply 1.15 x 1.15 to produce 1.31 format data after shift correc-
tion. Sign extend the result to 9.31 format before passing it to the Accumulator. Sat-
urate the Accumulator after copying or accumulating to maintain 9.31 precision.
Result is between minimum -1 and maximum 1-2
minimum 0x80 0000 0000 and maximum 0x7F FFFF FFFF).
(FU)
Unsigned fraction. Multiply 0.16 x 0.16 to produce 0.32 format data. Perform no
shift correction. Zero extend the result to 8.32 format before passing it to the Accu-
mulator. Saturate the Accumulator after copying or accumulating to maintain 8.32
precision.
Unsigned integer. Multiply 16.0 x 16.0 to produce 32.0 format data. Perform no shift
correction. Zero extend the result to 40.0 format before passing it to the Accumula-
tor. Saturate the Accumulator after copying or accumulating to maintain 40.0 preci-
sion.
In either case, the resulting hexadecimal range is minimum 0x00 0000 0000 through
maximum 0xFF FFFF FFFF.
(IS)
Signed integer. Multiply 16.0 x 16.0 to produce 32.0 format data. Perform no shift
correction. Sign extend the result to 40.0 format before passing it to the Accumulator.
Saturate the Accumulator after copying or accumulating to maintain 40.0 precision.
Result is between minimum -2
minimum 0x80 0000 0000 and maximum 0x7F FFFF FFFF).
(W32)
Signed fraction with 32-bit saturation. Multiply 1.15 x 1.15 to produce 1.31 format
data after shift correction. Sign extend the result to 9.31 format before passing it to
the Accumulator. Saturate the Accumulator after copying or accumulating at bit 31
to maintain 1.31 precision. Result is between minimum -1 and maximum 1-2
expressed in hex, between minimum 0xFF 8000 0000 and maximum 0x00 7FFF
FFFF).
(M)
Mixed mode multiply (valid only for MAC1). When issued in a fraction mode
instruction (with Default, FU, T, TFU, or S2RND mode), multiply 1.15 * 0.16 to
produce 1.31 results.
When issued in an integer mode instruction (with IS, ISS2, or IH mode), multiply
16.0 * 16.0 (signed * unsigned) to produce 32.0 results.
No shift correction in either case. Src_reg_0 is the signed operand and Src_reg_1 is
the unsigned operand.
Accumulation and extraction proceed according to the other mode flag or Default.
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Arithmetic Operations
-31
(or, expressed in hex, between
39
39
and maximum 2
-1 (or, expressed in hex, between
-31
(or,
15-55
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