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System Reset and Powerup
System Reset and Powerup
Table 3-6
describes the five types of resets. Note all resets, except System
Software, reset the core.
Table 3-6. Resets
Reset
Hardware Reset
System Software
Reset
Watchdog
Timer Reset
3-12
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Source
The RESET pin causes a
hardware reset.
Writing b#111 to bits [2:0]
in the system MMR
SWRST at address 0xFFC0
0100 causes a System Soft-
ware reset.
Programming the watchdog
timer appropriately causes a
Watchdog Timer reset.
Result
Resets both the core and the peripherals,
including the Dynamic Power Management
Controller (DPMC).
Resets the No Boot on Software Reset bit in
SYSCR. For more information, see
Register" on page
3-14.
Resets only the peripherals, excluding the RTC
(Real-Time Clock) block and most of the
DPMC. The DPMC resets only the No Boot
on Software Reset bit in SYSCR. Does not reset
the core. Does not initiate a boot sequence.
Resets both the core and the peripherals,
excluding the RTC block and most of the
DPMC.
The Software Reset register (SWRST) can be
read to determine whether the reset source was
the watchdog timer.
"SYSCR
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