Analog Devices ADSP-BF53x Blackfin Reference page 400

Instruction Overview
Table 9-2. Accumulator to Half D-Register Move Options (Cont'd)
Option Accumulator Copy Formatting
(S2RND) Signed fraction with scaling and rounding. Shift the Accumulator contents one
place to the left (multiply x 2). Round Accumulator 9.31 format value at bit 16.
(RND_MOD bit in the ASTAT register controls the rounding.) Saturate the
result to 1.15 precision and copy it to the destination register half. Result is
between minimum -1 and maximum 1-2
mum 0x8000 and maximum 0x7FFF).
The Accumulator is unaffected by extraction.
(ISS2) Signed integer with scaling. Extract the lower 16 bits of the Accumulator. Shift
them one place to the left (multiply x 2). Saturate the result for 16.0 format and
copy to the destination register half. Result is between minimum -2
mum 2
0x7FFF).
The Accumulator is unaffected by extraction.
(IH) Signed integer, high word extract. Round Accumulator 40.0 format value at bit
16. (RND_MOD bit in the ASTAT register controls the rounding.) Saturate to
32.0 result. Copy the upper 16 bits of that value to the destination register half.
Result is between minimum -2
between minimum 0x8000 and maximum 0x7FFF).
The Accumulator is unaffected by extraction.
To truncate the result, the operation eliminates the least significant bits
that do not fit into the destination register.
When necessary, saturation is performed after the rounding.
See "Saturation" on page 1-17
Flags Affected
The Accumulator to Half D-register Move versions of this instruction
affect the following flags.
• is set if the result written to the half D-register file saturates 16
V
bits; cleared if no saturation.
• is set if
VS
9-20 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
15
-1 (or, expressed in hex, between minimum 0x8000 and maximum
15
for a description of saturation behavior.
is set; unaffected otherwise.
V
-15
(or, expressed in hex, between mini-
15
and maximum 2 -1 (or, expressed in hex,
15
and maxi-