Table 3-59 Domain Access Control Register Bit Functions; Table 3-60 Results Of Access To The Domain Access Control Register; Figure 3-35 Domain Access Control Register Format - ARM ARM1176JZF-S Technical Reference Manual

3.2.16 c3, Domain Access Control Register
Field
Bits
name
-
D<n>
a. n is the Domain number in the range between 0 and 15
ARM DDI 0301H
ID012310
The purpose of the Domain Access Control Register is to hold the access permissions for a
maximum of 16 domains.
Table 3-59 lists the purposes of the individual bits in the Domain Access Control Register.
The Domain Access Control Register is:
• in CP15 c3
• a 32-bit read/write register banked for Secure and Non-secure worlds
• accessible in privileged modes only.
Figure 3-35 shows the bit arrangement of the Domain Access Control Register.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
D15 D14 D13 D12 D11
Table 3-59 lists how the bit values correspond with the Domain Access Control Register
functions.
Function
a The purpose of the fields D15-D0 in the register is to define the access permissions for each one of
the 16 domains. These domains can be either sections, large pages or small pages of memory:
b00 = No access, reset value. Any access generates a domain fault.
b01 = Client. Accesses are checked against the access permission bits in the TLB entry.
b10 = Reserved. Any access generates a domain fault.
b11 = Manager. Accesses are not checked against the access permission bits in the TLB entry, so a
permission fault cannot be generated.
Attempts to write to this register in Secure Privileged mode when CP15SDISABLE is HIGH
result in an Undefined exception, see TrustZone write access disable on page 2-9.
Table 3-60 lists the results of attempted access for each mode.

Table 3-60 Results of access to the Domain Access Control Register

Secure Privileged
Read
Secure data
To use the Domain Access Control Register read or write CP15 c3 with:
• Opcode_1 set to 0
• CRn set to c3
• CRm set to c0
• Opcode_2 set to 0.
For example:
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D10 D9 D8 D7

Figure 3-35 Domain Access Control Register format

Table 3-59 Domain Access Control Register bit functions

Non-secure Privileged
Write Read
Secure data Non-secure data
System Control Coprocessor
D6 D5 D4 D3 D2
User
Write
Non-secure data Undefined exception
D1 D0
3-63