14.10 Monitor Debug-Mode Debugging - ARM ARM1176JZF-S Technical Reference Manual

Table of Contents

Advertisement

14.10 Monitor debug-mode debugging

14.10.1 Receiving data from the core
14.10.2 Sending data to the core
ARM DDI 0301H
ID012310
If DSCR[15:14] b10 selecting Monitor debug-mode, then the processor takes an exception,
rather than halting, when a software debug event occurs. See Halting debug-mode debugging on
page 13-50 for details. When the exception is taken, the handler uses the DCC to transmit status
information to, and receive commands from the host using a DBGTAP debugger. Monitor
debug-mode is essential in real-time systems when the core cannot be halted to collect
information.
SCAN_N 5
INTEST
FOREACH Data2Read
LOOP
DATA 0x00000000 Valid readData
UNTIL Valid==1
Save value in readData
END
SCAN_N 5
EXTEST
FOREACH Data2Write
LOOP
DATA Data2Write nRetry
UNTIL nRetry==1
END
Copyright © 2004-2009 ARM Limited. All rights reserved.
Non-Confidential, Unrestricted Access
; select DTR
; wait until instruction ends
; select DTR
; wait until instruction ends
Debug Test Access Port
14-42

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents