Cp14 Registers Reset - ARM ARM1176JZF-S Technical Reference Manual

13.4

CP14 registers reset

ARM DDI 0301H
ID012310
The CP14 debug registers that are accessible through the external interface are all reset by the
processor power-on reset signal, nPORESETIN, see Reset with no IEM on page 9-4 or Reset
with IEM on page 9-8.
This ensures that a vector catch set on the reset vector is taken when nRESETIN is deasserted.
It also ensure that the DBGTAP debugger can be connected when the processor is running
without clearing CP14 debug setting, because DBGnTRST does not reset these registers.
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Debug
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