ARM ARM1176JZF-S Technical Reference Manual page 741

Advanced High-performance Bus (AHB)
Advanced Microcontroller Bus Architecture (AMBA)
Advanced Peripheral Bus (APB)
AHB
AHB Access Port (AHB-AP)
AHB-AP
AHB-Lite
Aligned
AMBA
Advanced Trace Bus (ATB)
APB
Application Specific Integrated Circuit (ASIC)
Application Specific Standard Part/Product (ASSP)
Architecture
ARM DDI 0301H
ID012310
A bus protocol with a fixed pipeline between address/control and data phases. It only supports
a subset of the functionality provided by the AMBA AXI protocol. The full AMBA AHB
protocol specification includes a number of features that are not commonly required for master
and slave IP developments and ARM Limited recommends only a subset of the protocol is
usually used. This subset is defined as the AMBA AHB-Lite protocol.
See also Advanced Microcontroller Bus Architecture and AHB-Lite.
A family of protocol specifications that describe a strategy for the interconnect. AMBA is the
ARM open standard for on-chip buses. It is an on-chip bus specification that details a strategy
for the interconnection and management of functional blocks that make up a System-on-Chip
(SoC). It aids in the development of embedded processors with one or more CPUs or signal
processors and multiple peripherals. AMBA complements a reusable design methodology by
defining a common backbone for SoC modules.
A simpler bus protocol than AXI and AHB. It is designed for use with ancillary or
general-purpose peripherals such as timers, interrupt controllers, UARTs, and I/O ports.
Connection to the main system bus is through a system-to-peripheral bus bridge that helps to
reduce system power consumption.
See Advanced High-performance Bus.
An optional component of the DAP that provides an AHB interface to a SoC.
See AHB Access Port.
A subset of the full AMBA AHB protocol specification. It provides all of the basic functions
required by the majority of AMBA AHB slave and master designs, particularly when used with
a multi-layer AMBA interconnect. In most cases, the extra facilities provided by a full AMBA
AHB interface are implemented more efficiently by using an AMBA AXI protocol interface.
A data item stored at an address that is divisible by the number of bytes that defines the data size
is said to be aligned. Aligned words and halfwords have addresses that are divisible by four and
two respectively. The terms word-aligned and halfword-aligned therefore stipulate addresses
that are divisible by four and two respectively.
See Advanced Microcontroller Bus Architecture.
A bus used by trace devices to share CoreSight capture resources.
See Advanced Peripheral Bus.
An integrated circuit that has been designed to perform a specific application function. It can be
custom-built or mass-produced.
An integrated circuit that has been designed to perform a specific application function. Usually
consists of two or more separate circuit functions combined as a building block suitable for use
in a range of products for one or more specific application markets.
The organization of hardware and/or software that characterizes a processor and its attached
components, and enables devices with similar characteristics to be grouped together when
describing their behavior, for example, Harvard architecture, instruction set architecture,
ARMv6 architecture.
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