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4.3
Endian support
4.3.1
Load unsigned byte, endian independent
4.3.2
Load signed byte, endian independent
4.3.3
Store byte, endian independent
ARM DDI 0301H
ID012310
The architectural specification of unaligned data representations is defined in terms of bytes
transferred between memory and register, regardless of bus width and bus endianness.
Little-endian data items are described using lower-case byte labeling bX...b0, byteX to byte 0,
and a pointer is always treated as pointing to the least significant byte of the addressed data.
Byte invariant, BE-8, big-endian data items are described using upper-case byte labeling
B0...BX, BYTE0 to BYTEX, and a pointer is always treated as pointing to the most significant
byte of the addressed data.
The addressed byte is loaded from memory into the low eight bits of the general-purpose register
and the upper 24 bits are zeroed, as Figure 4-1 shows.
The addressed byte is loaded from the memory into the low eight bits of the general-purpose
register and the sign bit is extended into the upper 24 bits of the register as Figure 4-2 shows.
In Figure 4-2, se means b, bit [7], sign extension.
The low eight bits of the general-purpose register are stored into the addressed byte in memory,
as Figure 4-3 on page 4-7 shows.
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Non-Confidential, Unrestricted Access
Unaligned and Mixed-endian Data Access Support
Memory
7
0
Address
A[31:0]
b
Memory
7
0
Address
A[31:0]
b
Register
31
23
15
7
0
0
0
Figure 4-1 Load unsigned byte
Register
31
23
15
7
se
se
se
Figure 4-2 Load signed byte
0
b
0
b
4-6
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