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ARM DDI 0301H
ID012310
Debug
This exception cannot occur because software debug events are ignored while in
Debug state.
SVC
The instruction is ignored.
SMC
The instruction is ignored.
Undefined Exception
When an Undefined exception occurs in Debug state, the behavior of the core is
as follows:
•
PC, CPSR, SPSR_und, R14_und and DSCR[5:2], method of entry bits, are
unchanged.
•
The processor remains in Debug state.
•
DSCR[8], sticky undefined bit, is set.
Precise Data abort
When a precise Data Abort occurs in Debug state the behavior of the core is as
follows:
•
PC, CPSR, SPSR_abt, R14_abt and DSCR [5:2], method of entry bits, are
unchanged
•
the processor remains in Debug state
•
DSCR[6], sticky precise data abort bit, is set
•
DFSR and FAR are set.
Imprecise Data Abort
When an imprecise Data Abort is detected in Debug state, the behavior of the core
is as follows, regardless of the setting of the CPSR A bit:
•
PC, CPSR, SPSR_abt, R14_abt and DSCR[5:2], method of entry bits, are
unchanged.
•
The processor remains in Debug state.
•
DSCR[7], sticky imprecise data abort bit, is set.
•
The imprecise Data Abort is not taken, so DFSR is not set and the FAR is
not updated.
Note
The DFSR and FAR that are updated depends on if the core is in a Secure or Non-secure state.
The registers that can be read in Debug state depends on the current setting of the NS bit. The
DFSR and FAR are always updated for precise data aborts in Debug state even when the
processor is in Secure User mode, and SPIDEN is not set. In such circumstances the debugger
has no access to DFSR and FAR to restore their values.
Imprecise Data Aborts in detail
The processor takes imprecise data abort exceptions when:
•
an imprecise data abort is pending
•
the A bit in the CPSR is not set
•
the processor is not in Debug state.
On entry to Debug state, DSCR[19] is normally zero. The debugger must issue a Data Memory
Barrier operation to flush all pending memory operations to the system. Once these operations
have completed, the processor sets DSCR[19]. If any of these operations cause imprecise data
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Debug
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