Table 3-99 Primary Region Remap Register Bit Functions; Figure 3-57 Primary Region Remap Register Format - ARM ARM1176JZF-S Technical Reference Manual

ARM DDI 0301H
ID012310
Note
The behavior of the memory region remap registers depends on the TEX remap bit, see c1,
Control Register on page 3-44.
Figure 3-57 shows the arrangement of the bits in the Primary Region Remap Register.
31
UNP/SBZ
Table 3-99 lists the functional bits of the Primary Region Remap Register.
Bits Field name
[31:20] -
[19] -
[18] -
[17] -
[16] -
[15:14] -
[13:12] -
[11:10] -
[9:8] -
[7:6] -
[5:4] -
[3:2] -
[1:0] -
a. The reset values ensure that no remapping occurs at reset
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20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
- - - - - -

Figure 3-57 Primary Region Remap Register format

Table 3-99 Primary Region Remap Register bit functions

Function a
UNP/SBZ
Remaps shareable attribute when S=1 for Normal regions
1 = reset value
Remaps shareable attribute when S=0 for Normal regions
0 = reset value
Remaps shareable attribute when S=1 for Device regions
0 = reset value
Remaps shareable attribute when S= 0 for Device regions
1= reset value
Remaps {TEX[0],C,B} = b111
b10 = reset value
Remaps {TEX[0],C,B} = b110
b00 = reset value
Remaps {TEX[0],C,B} = b101
b10 = reset value
Remaps {TEX[0],C,B} = b100
b10 = reset value
Remaps {TEX[0],C,B} = b011
b10 = reset value
Remaps {TEX[0],C,B} = b010
b10 = reset value
Remaps {TEX[0],C,B} = b001
b01 = reset value
Remaps {TEX[0],C,B} = b000
b00 = reset value
System Control Coprocessor
- - - - - -
b
b
b
b
3-102