ARM ARM1176JZF-S Technical Reference Manual page 250

Bits Field name
[12] a
BP
[11:7] ES
[6:2] IS
[1:0] Status
a. The external start and end addresses and the Stride must all be multiples of the transaction size. If this is not the case, the BP
bit is set to 1, and the DMA channel does not start.
ARM DDI 0301H
ID012310
Table 3-117 DMA Channel Status Register bit functions (continued)
Function
Indicates whether the DMA parameters are conditioned inappropriately or acceptable:
0 = DMA parameters are acceptable, reset value
1 = DMA parameters are conditioned inappropriately.
Indicates the status of the External Address Error. All other encodings are Reserved:
b00000 = No error, reset value
b00xxx = No error
b01001 = Unshared data error
b11010 = External Abort, can be imprecise
b11100 = External Abort on translation of first-level page table
b11110 = External Abort on translation of second-level page table
b10011 = Access Bit fault on section
b10110 = Access Bit fault on page
b10101 = Translation fault, section
b10111 = Translation fault, page
b11001 = Domain fault, section
b11011 = Domain fault, page
b11101 = Permission fault, section
b11111 = Permission fault, page.
Indicates the status of the Internal Address Error. All other encodings are Reserved:
b00000 = No error, reset value
b00xxx = No error
b01000 = TCM out of range
b11100 = External Abort on translation of first-level page table
b11110 = External Abort on translation of second-level page table
b10011 = Access Bit fault on section
b10110 = Access Bit fault on page
b10101 = Translation fault, section
b10111 = Translation fault, page
b11001 = Domain fault, section
b11011 = Domain fault, page
b11101 = Permission fault, section
b11111 = Permission fault, page.
Indicates the status of the DMA channel:
b00 = Idle, reset value
b01 = Queued
b10 = Running
b11 = Complete or Error.
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System Control Coprocessor
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