Table 3-80 Results Of Access To The Data Memory Barrier Operation; Table 3-81 Results Of Access To The Wait For Interrupt Operation - ARM ARM1176JZF-S Technical Reference Manual

Secure Privileged
Read
Undefined exception
ARM DDI 0301H
ID012310
Table 3-80 lists the results of attempted access for each mode.

Table 3-80 Results of access to the Data Memory Barrier operation

To use the Data Memory Barrier operation write CP15 with <Rd> SBZ and:
• Opcode_1 set to 0
• CRn set to c7
• CRm set to c10
• Opcode_2 set to 5.
For example:
MCR p15,0,<Rd>,c7,c10,5
For more details, see Explicit Memory Barriers on page 6-25.
Wait For Interrupt operation
The purpose of the Wait For Interrupt operation is to put the processor in to a low power state,
see Standby mode on page 10-3.
The Wait For Interrupt operation is:
• in CP15 c7
• 32-bit write only access, common to Secure and Non-secure worlds
• accessible in privileged modes only.
Table 3-81 lists the results of attempted access for each mode.
Write
Wait For Interrupt
To use the Wait For Interrupt operation write CP15 with <Rd> SBZ and:
• Opcode_1 set to 0
• CRn set to c7
• CRm set to c0
• Opcode_2 set to 4.
For example:
MCR p15,0,<Rd>,c7,c0,4
This puts the processor into a low-power state and stops it executing following instructions until
an interrupt, an imprecise external abort, or a debug request occurs, regardless of whether the
interrupts or external imprecise aborts are disabled by the masks in the CPSR. When an interrupt
does occur, the MCR instruction completes. If interrupts are enabled, the IRQ or FIQ handler is
entered as normal. The return link in R14_irq or R14_fiq contains the address of the MCR
instruction plus 8, so that the normal instruction used for interrupt return (
returns to the instruction following the MCR.
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Non-Confidential, Unrestricted Access
; Data Memory Barrier Operation.

Table 3-81 Results of access to the Wait For Interrupt operation

Non-secure Privileged
Read
Undefined exception
; Wait For Interrupt.
System Control Coprocessor
Read
Undefined exception
User
Write
Wait For Interrupt Undefined exception
SUBS PC,R14,#4
Write
Data
)
3-85