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ARM DDI 0301H
ID012310
•
Secure Monitor.
Thumb instruction set
The Thumb instruction set contains a subset of the most commonly-used 32-bit ARM
instructions encoded into 16-bit wide opcodes. This reduces the amount of memory required for
instruction storage.
DSP instructions
The DSP extensions to the ARM instruction set provide:
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16-bit data operations
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saturating arithmetic
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MAC operations.
The processor executes multiply instructions using a single-cycle 32x16 implementation. The
processor can perform 32x32, 32x16, and 16x16 multiply instructions (MAC).
Media extensions
The ARMv6 instruction set provides media instructions to complement the DSP instructions.
There are four media instruction groups:
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Multiplication instructions for handling 16-bit and 32-bit data, including
dual-multiplication instructions that operate on both 16-bit halves of their source registers.
This group includes an instruction that improves the performance and size of code for
multi-word unsigned multiplications.
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Single Instruction Multiple Data (SIMD) Instructions to perform operations on pairs of
16-bit values held in a single register, or on sets of four 8-bit values held in a single
register. The main operations supplied are addition and subtraction, selection, pack, and
saturation.
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Instructions to extract bytes and halfwords from registers and zero-extend or sign-extend
them. These include a parallel extraction of two bytes followed by extension of each byte
to a halfword.
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Unsigned Sum-of-Absolute-Differences (SAD) instructions. This is used in MPEG motion
estimation.
Datapath
The datapath consists of three pipelines:
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ALU, shift and Sat pipeline
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MAC pipeline
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load or store pipeline, see Load Store Unit (LSU) on page 1-11.
ALU, shift or Sat pipe
The ALU, shift and Sat pipeline executes most of the ALU operations, and includes a 32-bit
barrel shifter. It consists of three pipeline stages:
Shift
The Shift stage contains the full barrel shifter. This stage performs all shifts,
including those required by the LSU.
The Shift stage implements saturating left shift that doubles the value of an
operand and saturates it.
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Introduction
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