Figure 6-8 Armv6 Second-Level Descriptor Format - ARM ARM1176JZF-S Technical Reference Manual

Translation fault
Large page (64KB)
Extended small
page (4KB)
ARM DDI 0301H
ID012310
Bits [1:0] == b01
The entry points to a second-level page table, called a Coarse page table.
Figure 6-8 on page 6-40 shows the formats of the possible entries in the Coarse
page table.
Bits [1:0] == b10
The entry points to a either a 1MB Section of memory or a 16MB Supersection
of memory. Bit [18] of the descriptor selects between a Section and a
Supersection. For details of supersections see Supersections on page 6-6.
Note
You must repeat any Supersection description in 16 consecutive page table
locations, with the first description occurring on a 16-word boundary. For more
information see the ARM Architecture Reference Manual.
Bits [1:0] == b11
Reserved.
Figure 6-8 shows the format of an ARMv6 second-level descriptors.
31
Large page base address
Extended small page base address
As shown in Figure 6-8, bits [1:0] of a second-level descriptor determine the type of the
descriptor:
Bits [1:0] == b00
Translation fault.
Bits [1:0] == b01
The entry points to a 64KB Large page in memory.
Note
You must repeat any Large page description in 16 consecutive page table
locations, with the first description occurring on a 16-word boundary. For more
information see the ARM Architecture Reference Manual.
Bits [1:0] == b1x
The entry points to a 4KB Extended small page in memory.
Bit [0] of the entry is the XN bit for the entry.
Figure 6-9 on page 6-41 shows an overview of the section, supersection, and page translation
process using ARMv6 descriptors.
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16 15 14 12 11 10 9 8 7 6 5 4 3 2 1 0
Ignored
A
X
n
TEX S P
N
G
X
A
n
S
P
G
X

Figure 6-8 ARMv6 second-level descriptor format

Memory Management Unit
0 0
B
SBZ AP C 0 1
X
TEX AP C B 1
N
6-40