ARM ARM926EJ-S Manuals

Manuals and User Guides for ARM ARM926EJ-S. We have 1 ARM ARM926EJ-S manual available for free PDF download: Technical Reference Manual

ARM ARM926EJ-S Technical Reference Manual (248 pages)

Brand: ARM | Category: Computer Hardware | Size: 1.7 MB

Change History
2
Preface

16
- About this Manual
  16
- Key to Timing Diagram Conventions
  19
- Feedback
  21
Chapter 1 Introduction

23
Chapter 2 Programmer's Model

29
Chapter 3 Memory Management Unit

66
Chapter 4 Caches and Write Buffer

98
Chapter 5 Tightly-Coupled Memory Interface

110
Chapter 6 Bus Interface Unit

141
Chapter 7 Noncachable Instruction Fetches

153
- About Noncachable Instruction Fetches
  154
- Figure 8-7 Privileged Instructions
  157
Chapter 8 Coprocessor Interface

158
- About the ARM926EJ-S External Coprocessor Interface
  158
- Figure 8-1 Producing a Coprocessor Clock
  158
- Figure 8-2 Coprocessor Clocking
  158
- Ldc/Stc
  160
- Figure 8-3 LDC/STC Cycle Timing
  160
- Table 8-1 Handshake Signal Encoding
  161
- Mcr/Mrc
  162
- Figure 8-4 MCR/MRC Cycle Timing
  162
- Figure 8-5 Interlocked MCR
  163
- Cdp
  164
- Figure 8-6 Latecanceled CDP
  164
- Privileged Instructions
  165
- Busy-Waiting and Interrupts
  166
- Figure 8-8 Busy Waiting and Interrupts
  166
- Cpburst
  167
- Table 8-2 CPBURST Encoding
  167
- Cpabort
  168
- Figure 8-9 CPBURST and CPABORT Timing
  168
- Ncpinstrvalid
  169
- Connecting Multiple External Coprocessors
  170
- Figure 8-10 Arrangement for Connecting Two Coprocessors
  170
Chapter 9 Instruction Memory Barrier

171
- About the Instruction Memory Barrier Operation
  172
- IMB Operation
  173
- Example IMB Sequences
  175
Chapter 10 Embedded Trace Macrocell Support

177
- About Embedded Trace Macrocell Support
  178
Chapter 11 Debug Support

181
Chapter 12 Power Management

185
Appendix A Signal Descriptions

189
- Table A-4 JTAG Signals
  189
- Table A-5 Miscellaneous Signals
  189
- Signal Properties and Requirements
  190
- AHB Related Signals
  191
  - Table A-1 AHB Related Signals
    191
- Coprocessor Interface Signals
  193
  - Table A-2 Coprocessor Interface Signals
    193
- Debug Signals
  195
  - Table A-3 Debug Signals
    195
- JTAG Signals
  197
- Miscellaneous Signals
  198
- ETM Interface Signals
  200
  - Table A-6 ETM Interface Signals
    200
- TCM Interface Signals
  202
  - Table A-7 TCM Interface Signals
    202
CP15 Test and Debug Registers

207
Appendix B CP15 Test and Debug Registers

208
- About the Test and Debug Registers
  208
- Figure B-10 Memory Region Attribute Resolution
  223

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ARM ARM926EJ-S Manuals

ARM ARM926EJ-S Technical Reference Manual (248 pages)

Table of Contents

Preface

Chapter 1 Introduction

Chapter 2 Programmer's Model

Chapter 3 Memory Management Unit

Chapter 4 Caches and Write Buffer

Chapter 5 Tightly-Coupled Memory Interface

Chapter 6 Bus Interface Unit

Chapter 7 Noncachable Instruction Fetches

Chapter 8 Coprocessor Interface

Chapter 9 Instruction Memory Barrier

Chapter 10 Embedded Trace Macrocell Support

Chapter 11 Debug Support

Chapter 12 Power Management

Appendix A Signal Descriptions

CP15 Test and Debug Registers

Appendix B CP15 Test and Debug Registers

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