Figure 6-15 Large Page Table Walk, Backwards-Compatible Format - ARM ARM1176JZF-S Technical Reference Manual

Table of Contents

Advertisement

31
31
31
Coarse page table base address
31
Coarse page table base address
31
Page base address
31
Page base address
ARM DDI 0301H
ID012310
Translation table base
14 13
Translation base
First-level descriptor address
14 13
Translation base
First-level descriptor
Second-level descriptor address
Second-level descriptor
16
15
14
0 TEX
Physical address
16 15
Using backwards-compatible format descriptors, the 64KB large page is generated by setting all
of the AP bit pairs to the same values, AP3=AP2=AP1=AP0. If any one of the pairs are different,
then the 64KB large page is converted into four 16KB large page subpages. The subpage access
permission bits are chosen using the virtual address bits [15:14].
Second-level small page table walk
If bits [1:0] of the second-level descriptor are b10 for backwards-compatible format, then a
small page table walk is required.
Figure 6-16 on page 6-50 shows the translation process for a 4KB small page or a 1KB small
page subpage using backwards-compatible format descriptors, AP bits enabled.
Copyright © 2004-2009 ARM Limited. All rights reserved.
Non-Confidential, Unrestricted Access
Modified virtual address
31
20 19
First-level table index
2 1
First-level table index
10 9 8
5 4
3
2 1 0
N
P Domain
S
SBZ
10 9
2 1 0
Second-level
table index
12 11 10 9 8 7 6 5 4 3 2 1 0
AP
AP
AP
AP
C B 0
3
2
1
0
Page index

Figure 6-15 Large page table walk, backwards-compatible format

Memory Management Unit
0
16 15
12 11
Page index
Second-level
table index
0
0
0
0
1
SBZ
0
0
1
0
0
6-49

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents