Table 8-2 Interrupt Controller Type Register Bit Assignments; Figure 8-2 Auxiliary Control Register Bit Assignments - ARM Cortex-M3 Technical Reference Manual

Nested Vectored Interrupt Controller
31
8-8
Table 8-2 describes the bit assignments of the Interrupt Controller Type Register.

Table 8-2 Interrupt Controller Type Register bit assignments

Bits
[31:5]
[4:0]
a. The processor only supports between 1 and 240 external interrupts.
Auxiliary Control Register
Use the Auxiliary Control Register to disable certain aspects of functionality within the
processor.
The register address, access type, and Reset state are:
Address
0xE000E008
Access Read/write
Reset state
0x00000000
Figure 8-2 shows the bit assignments of the Auxiliary Control Register.
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Field Function
- Reserved.
INTLINESNUM Total number of interrupt lines in groups of 32:
b00000 = 0...32
b00001 = 33...64
b00010 = 65...96
b00011 = 97...128
b00100 = 129...160
b00101 = 161...192
b00110 = 193...224
b00111 = 225...256a
Reserved

Figure 8-2 Auxiliary Control Register bit assignments

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