Intelligent Energy Management; Figure - ARM ARM1176JZF-S Technical Reference Manual

10.4

Intelligent Energy Management

10.4.1 Purpose of IEM
10.4.2 Structure of IEM
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This section describes the provision of IEM in the ARM1176JZF-S processors:
• Purpose of IEM
• Structure of IEM
• Operation of IEM on page 10-8
• Use of IEM on page 10-8
Note
The ARM1176JZF-S processor is IEM enabled but the level of support for the technology
depends on the specific implementation.
For information on clocks and resets with IEM, see Clocking and resets with IEM on page 9-5.
The purpose of IEM technology is to provide a dynamic optimization between processor
performance and power consumption.
The ARM1176JZF-S processor provides a number of features that enable the processor voltage
to vary relative to the voltage of the rest of the system. For this purpose the processor optionally
implements:
• Placeholders for level shifters and clamps for some inputs and outputs including:
— the debug interface
— interrupt signals including the VIC interface
— resets
— clocks.
• IEM register slices for the AXI level two interfaces.
Note
The ETM and coprocessor interfaces do not implement level shifters or clamps.
Figure 10-1 on page 10-8 shows the basic structure for IEM in the processor.
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Power Control
10-7