Table 3-41 Resultant B Bit, U Bit, And Ee Bit Values - ARM ARM1176JZF-S Technical Reference Manual

3.2.8 c1, Auxiliary Control Register
ARM DDI 0301H
ID012310
The B, EE, and U bits depend on how you set BIGENDINIT and UBITINIT at reset.
Table 3-41 lists the values of the B, EE, and U bits that result for the reset values of these signals.
See Reset values of the U, B, and EE bits on page 4-19.
Behavior of the Control Register
These bits in the Control Register exhibit specific behavior:
A bit The A bit setting takes priority over the U bit. The Data Abort trap is taken if strict
alignment is enabled and the data access is not aligned to the width of the
accessed data item.
DT bit This bit is used in ARM946 and ARM966 processors to enable the Data TCM.
In ARMv6, the TCM blocks have individual enables that apply to each block. As
a result, this bit is now redundant and Should Be One. See c9, Data TCM Region
Register on page 3-89 for a description of the ARM1176JZF-S TCM enables.
IT bit This bit is used in ARM946 and ARM966 processors to enable the Instruction
TCM.
In ARMv6, the TCM blocks have individual enables that apply to each block. As
a result, this bit is now redundant and Should Be One. See c9, Instruction TCM
Region Register on page 3-91 for a description of the ARM1176JZF-S TCM
enables.
R bit Modifying the R bit does not affect the access permissions of entries already in
the TLB. See MMU software-accessible registers on page 6-53.
S bit Modifying the S bit does not affect the access permissions of entries already in
the TLB. See MMU software-accessible registers on page 6-53.
W bit The ARM1176JZF-S processor does not implement the write buffer enable
because all memory writes take place through the Write Buffer.
The purpose of the Auxiliary Control Register is to control:
• program flow
• low interrupt latency
• cache cleaning
• MicroTLB cache strategy
• cache size restriction.
For more information on how the system control coprocessor operates with caches, see Cache
control and configuration on page 3-7.
Table 3-42 lists the purposes of the individual bits in the Auxiliary Control Register.
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Table 3-41 Resultant B bit, U bit, and EE bit values

UBITINIT BIGENDINIT
0 0
0 1
1 0
1 1
System Control Coprocessor
EE U B
0 0 0
0 0 1
0 1 0
1 1 0
3-48