ARM ARM1176JZF-S Technical Reference Manual page 50

ARM DDI 0301H
ID012310
Dormant mode
This mode powers down the processor and leaves the caches and the TCM
powered up and maintaining their state. The valid bits remain visible to software
to enable you to implement dormant mode. For full implementation of dormant
mode you must:
• modify the RAM blocks to include an input clamp
• implement separate power domains.
For full implementation of dormant mode see ARM1176JZF-S and ARM1176JZ-S
Implementation Guide.
For more details of power management features see Chapter 10 Power Control.
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