Table 13-11 Breakpoint Control Registers, Bit Field Definitions - ARM ARM1176JZF-S Technical Reference Manual

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Read/write
Bits
attributes
[31:23]
UNP/SBZP
[22:21]
RW
[20]
RW
[19:16]
RW
[15:14]
RW
[13:9]
UNP/SBZP
[8:5]
RW
ARM DDI 0301H
ID012310
Table 13-11 lists the bit field definitions for the Breakpoint Control Registers.
Reset
Description
value
-
Reserved.
00
Meaning of BVR00 = IMVA Match.01 = Context ID Match.10 = IMVA
Mis-match.11 = Reserved. If this breakpoint does not have Context ID capability, bit
21 is RAZ.
-
Enable linking:
0 = Linking disabled
1 = Linking enabled.
When this bit is set HIGH, the corresponding BRP is linked. See Table 13-12 on
page 13-19 for details.
-
Linked BRP number. The binary number encoded here indicates another BRP to link
this one with. If a BRP is linked with itself, it is architecturally Unpredictable if a
breakpoint debug event is generated. For ARM1176JZF-S processors the breakpoint
debug event is not generated.
-
b00 = Breakpoint matches in Secure or Non-secure world.
b01 = Breakpoint only matches in Non-secure world.
b10 = Breakpoint only matches in Secure world.b11 = Reserved
If this BRP is programmed for context ID comparison and linking (BCR[22:20] is
set b011), then the BCR[15:14] field of the IMVA-holding BRP takes precedence
and it is Undefined whether this field is included in the comparison or not. Therefore,
it must be set to b00.
The WCR[15:14] field of a WRP linked with this BRP also takes precedence over
this field.
-
Reserved.
-
Byte address select. The BVR is programmed with a word address. You can use this
field to program the breakpoint so it matches only if certain byte addresses are
accessed.
b0000 = The breakpoint never matches
bxxx1= If the byte at address {BVR[31:2], b00}+0 is accessed, the breakpoint
matches
bxx1x = If the byte at address {BVR[31:2], b00}+1 is accessed, the breakpoint
matches
bx1xx = If the byte at address {BVR[31:2], b00}+2 is accessed, the breakpoint
matches
b1xxx = If the byte at address {BVR[31:2], b00}+3 is accessed, the breakpoint
matches.
This field must be set to b1111 when this BRP is programmed for context ID
comparison, that is BCR[22:20] set to b01x. Otherwise breakpoint or watchpoint
debug events might not be generated as expected.
Note
These are little-endian byte addresses. This ensures that a breakpoint is triggered
regardless of the endianness of the instruction fetch.
For example, if a breakpoint is set on a certain Thumb instruction by doing BCR[8:5]
= b0011, it is triggered if in little-endian and IMVA[1:0] is b00 or if big-endian and
IMVA[1:0] is b10.
Copyright © 2004-2009 ARM Limited. All rights reserved.
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Table 13-11 Breakpoint Control Registers, bit field definitions

Debug
13-18

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