Table 3-131 Results Of Access To The Thread And Process Id Registers - ARM ARM1176JZF-S Technical Reference Manual

3.2.48 c13, Thread and process ID registers
Thread Secure
and Privileged
Process
ID
Read
Register
User Secure
Read/ data
a
Write
User Read Secure
a data
Only
Privileged Secure
a data
Only
a. The register names are:
- User Read/Write Thread and Process ID Register
- User Read Only Thread and Process ID Register
- Privileged Only Thread and Process ID Register.
ARM DDI 0301H
ID012310
MCR p15, 0, <Rd>, c13, c0, 1
You must ensure that software performs a Data Synchronization Barrier operation before
changes to this register. This ensures that all accesses are related to the correct context ID.
You must execute an IMB instruction immediately after changes to the Context ID Register. You
must not attempt to execute any instructions that are from an ASID-dependent memory region
between the change to the register and the IMB instruction. Code that updates the ASID must
execute from a global memory region.
You must program each process with a unique number to ensure that ETM and debug logic can
correctly distinguish between processes.
The purpose of the thread and process ID registers is to provide locations to store the IDs of
software threads and processes for OS management purposes.
The thread and process ID registers are:
• in CP15 c13
• three 32-bit read/write registers banked for Secure and Non-secure worlds:
— User Read/Write Thread and Process ID Register
— User Read Only Thread and Process ID Register
— Privileged Only Thread and Process ID Register.
• each accessible in different modes:
— User Read/Write: read/write in User and privileged modes
— User Read Only: read only in User mode, read/write in privileged modes
— Privileged Only: read/write in privileged modes only.
Table 3-131 lists the results of attempted access to each register for each mode.

Table 3-131 Results of access to the thread and process ID registers

Non-secure Privileged
Write Read
Secure Non-secure
data data
Secure Non-secure
data data
Secure Non-secure
data data
To use the thread and process ID registers read or write CP15 with:
• Opcode_1 set to 0
• CRn set to c13
• CRm set to c0
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;Write Context ID Register
Secure User
Write Read
Non-secure Secure
data data
Non-secure Secure
data data
Non-secure Undefined
data exception
System Control Coprocessor
Non-secure User
Write Read
Secure Non-secure
data data
Undefined Non-secure
exception data
Undefined Undefined
exception exception
Write
Non-secure
data
Undefined
exception
Undefined
exception
3-129