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1.4
ARM1176JZF-S architecture with Jazelle technology
1.4.1
Instruction compression
1.4.2
The Thumb instruction set
1.4.3
Java bytecodes
ARM DDI 0301H
ID012310
The ARM1176JZF-S processor has three instruction sets:
•
the 32-bit ARM instruction set used in ARM state, with media instructions
•
the 16-bit Thumb instruction set used in Thumb state
•
the 8-bit Java bytecodes used in Jazelle state.
For details of both the ARM and Thumb instruction sets, see the ARM Architecture Reference
Manual. For full details of the ARM1176JZF-S Java instruction set, see the Jazelle V1
Architecture Reference Manual.
A typical 32-bit architecture can manipulate 32-bit integers with single instructions, and address
a large address space much more efficiently than a 16-bit architecture. When processing 32-bit
data, a 16-bit architecture takes at least two instructions to perform the same task as a single
32-bit instruction.
When a 16-bit architecture has only 16-bit instructions, and a 32-bit architecture has only 32-bit
instructions, overall the 16-bit architecture has higher code density, and greater than half the
performance of the 32-bit architecture.
Thumb implements a 16-bit instruction set on a 32-bit architecture, giving higher performance
than on a 16-bit architecture, with higher code density than a 32-bit architecture.
The ARM1176JZ-S processor can easily switch between running in ARM state and running in
Thumb state. This enables you to optimize both code density and performance to best suit your
application requirements.
The Thumb instruction set is a subset of the most commonly used 32-bit ARM instructions.
Thumb instructions are 16 bits long, and have a corresponding 32-bit ARM instruction that has
the same effect on the processor model. Thumb instructions operate with the standard ARM
register configuration, enabling excellent interoperability between ARM and Thumb states.
Thumb has all the advantages of a 32-bit core:
•
32-bit address space
•
32-bit registers
•
32-bit shifter and Arithmetic Logic Unit (ALU)
•
32-bit memory transfer.
Thumb therefore offers a long branch range, powerful arithmetic operations, and a large address
space.
The availability of both 16-bit Thumb and 32-bit ARM instruction sets, gives you the flexibility
to emphasize performance or code size on a subroutine level, according to the requirements of
their applications. For example, you can code critical loops for applications such as fast
interrupts and DSP algorithms using the full ARM instruction set, and linked with Thumb code.
ARM architecture v6 with Jazelle technology executes variable length Java bytecodes. Java
bytecodes fall into two classes:
Hardware execution
Bytecodes that perform stack-based operations.
Copyright © 2004-2009 ARM Limited. All rights reserved.
Non-Confidential, Unrestricted Access
Introduction
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