Software Considerations - ARM ARM1176JZF-S Technical Reference Manual

2.13

Software considerations

2.13.1 Branch Target Address Cache flush
2.13.2 Waiting for DMA to complete
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When using the processor you must consider the following software issues:
• Branch Target Address Cache flush
• Waiting for DMA to complete.
When the processor switches from the Secure to the Non-secure state the Secure Monitor code
is responsible for flushing the BTAC if necessary. See About program flow prediction on
page 5-2 for more information.
When it is necessary to wait for the generation of an interrupt by the DMA indicating the
completion of a transfer between external memory and an Instruction TCM, the prioritization
between core requests from a tight-loop and the DMA can mean the DMA is locked out from
writing the TCM, so freezing the system. To avoid this, two mechanisms are recommended:
1. The use of the WFI operation in the wait-loop to freeze core execution while permitting
the DMA to continue. Standby mode is not entered in this case as the DMA keeps on
running and prevents this entry. See Standby mode on page 10-3 for more details.
2. Including at least five instructions, including NOP instructions, in the wait loop.
For details of the WFI operation see c7, Cache operations on page 3-69.
Note
In the ARM1176 instruction set,
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WFI is a valid instruction but is treated as a NOP.
Programmer's Model
2-59