ARM ARM1176JZF-S Technical Reference Manual page 350

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6.9.5
Domain fault
6.9.6
Permission fault
6.9.7
Debug event
ARM DDI 0301H
ID012310
Any change in the Force AP or XP bit configuration to enable or disable the generation of
Access Bit faults takes effect immediately. In the case where the TLB lookup hits an entry that
was created before Access Bit faults generation was enabled, and that this entry contains
AP[0]=0, then the TLB generates an Access Bit fault.
There are two types of domain fault:
Section
For a section the domain is checked when the first-level descriptor is returned.
Page
For a page the domain is checked when the second-level descriptor is returned.
For each type, the first-level descriptor indicates the domain in CP15 c3, the Domain Access
Control Register, to select. If the selected domain has bit 0 set to 0 indicating either no access
or reserved, then a domain fault occurs.
If the two-bit domain field returns Client, the access permission check is performed on the
access permission field in the TLB entry. A permission fault occurs if the access permission
check fails.
When Monitor debug-mode debug is enabled an abort can be taken caused by a breakpoint on
an instruction access or a watchpoint on a data access. In both cases the memory system
completes the access before the abort is taken. If an abort is taken when in Monitor debug-mode
debug then the appropriate FSR, IFSR or DFSR, is updated to indicate a debug abort.
If a watchpoint is taken the WFAR is set to the address that caused the watchpoint. Watchpoints
are not taken precisely because following instructions can run underneath load and store
multiples.
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Memory Management Unit
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