ARM ARM1176JZF-S Technical Reference Manual page 10

Table 3-5 Results of access to the Main ID Register ................................................................................ 3-20
Table 3-6 Cache Type Register bit functions ............................................................................................ 3-21
Table 3-7 Results of access to the Cache Type Register ......................................................................... 3-23
Table 3-8 Example Cache Type Register format ...................................................................................... 3-23
Table 3-9 TCM Status Register bit functions ............................................................................................ 3-24
Table 3-10 TLB Type Register bit functions ................................................................................................ 3-25
Table 3-11 Results of access to the TLB Type Register ............................................................................. 3-25
Table 3-12 Processor Feature Register 0 bit functions ............................................................................... 3-26
Table 3-13 Results of access to the Processor Feature Register 0 ............................................................ 3-27
Table 3-14 Processor Feature Register 1 bit functions ............................................................................... 3-28
Table 3-15 Results of access to the Processor Feature Register 1 ............................................................ 3-28
Table 3-16 Debug Feature Register 0 bit functions .................................................................................... 3-29
Table 3-17 Results of access to the Debug Feature Register 0 ................................................................. 3-29
Table 3-18 Auxiliary Feature Register 0 bit functions ................................................................................. 3-30
Table 3-19 Results of access to the Auxiliary Feature Register 0 .............................................................. 3-30
Table 3-20 Memory Model Feature Register 0 bit functions ....................................................................... 3-31
Table 3-21 Results of access to the Memory Model Feature Register 0 .................................................... 3-31
Table 3-22 Memory Model Feature Register 1 bit functions ....................................................................... 3-32
Table 3-23 Results of access to the Memory Model Feature Register 1 .................................................... 3-33
Table 3-24 Memory Model Feature Register 2 bit functions ....................................................................... 3-34
Table 3-25 Results of access to the Memory Model Feature Register 2 .................................................... 3-35
Table 3-26 Memory Model Feature Register 3 bit functions ....................................................................... 3-35
Table 3-27 Results of access to the Memory Model Feature Register 3 .................................................... 3-36
Table 3-28 Instruction Set Attributes Register 0 bit functions ..................................................................... 3-36
Table 3-29 Results of access to the Instruction Set Attributes Register 0 .................................................. 3-37
Table 3-30 Instruction Set Attributes Register 1 bit functions ..................................................................... 3-38
Table 3-31 Results of access to the Instruction Set Attributes Register 1 .................................................. 3-38
Table 3-32 Instruction Set Attributes Register 2 bit functions ..................................................................... 3-39
Table 3-33 Results of access to the Instruction Set Attributes Register 2 .................................................. 3-40
Table 3-34 Instruction Set Attributes Register 3 bit functions ..................................................................... 3-41
Table 3-35 Results of access to the Instruction Set Attributes Register 3 .................................................. 3-41
Table 3-36 Instruction Set Attributes Register 4 bit functions ..................................................................... 3-42
Table 3-37 Results of access to the Instruction Set Attributes Register 4 .................................................. 3-43
Table 3-38 Results of access to the Instruction Set Attributes Register 5 .................................................. 3-43
Table 3-39 Control Register bit functions .................................................................................................... 3-45
Table 3-40 Results of access to the Control Register ................................................................................. 3-47
Table 3-41 Resultant B bit, U bit, and EE bit values ................................................................................... 3-48
Table 3-42 Auxiliary Control Register bit functions ..................................................................................... 3-49
Table 3-43 Results of access to the Auxiliary Control Register .................................................................. 3-50
Table 3-44 Coprocessor Access Control Register bit functions .................................................................. 3-51
Table 3-45 Results of access to the Coprocessor Access Control Register ............................................... 3-51
Table 3-46 Secure Configuration Register bit functions .............................................................................. 3-52
Table 3-47 Operation of the FW and FIQ bits ............................................................................................. 3-53
Table 3-48 Operation of the AW and EA bits .............................................................................................. 3-53
Table 3-49 Secure Debug Enable Register bit functions ............................................................................ 3-54
Table 3-50 Results of access to the Coprocessor Access Control Register ............................................... 3-55
Table 3-51 Non-Secure Access Control Register bit functions ................................................................... 3-56
Table 3-52 Results of access to the Auxiliary Control Register .................................................................. 3-57
Table 3-53 Translation Table Base Register 0 bit functions ....................................................................... 3-58
Table 3-54 Results of access to the Translation Table Base Register 0 .................................................... 3-58
Table 3-55 Translation Table Base Register 1 bit functions ....................................................................... 3-59
Table 3-56 Results of access to the Translation Table Base Register 1 .................................................... 3-60
Table 3-57 Translation Table Base Control Register bit functions .............................................................. 3-61
Table 3-58 Results of access to the Translation Table Base Control Register ........................................... 3-62
Table 3-59 Domain Access Control Register bit functions .......................................................................... 3-63
Table 3-60 Results of access to the Domain Access Control Register ....................................................... 3-63
Table 3-61 Data Fault Status Register bit functions .................................................................................... 3-64
Table 3-62 Results of access to the Data Fault Status Register ................................................................. 3-66
Table 3-63 Instruction Fault Status Register bit functions ........................................................................... 3-67
Table 3-64 Results of access to the Instruction Fault Status Register ........................................................ 3-67
ARM DDI 0301H
ID012310
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