Figure 2-17 Clrex Instruction; Figure 2-18 Nop-Compatible Hint Instruction - ARM ARM1176JZF-S Technical Reference Manual

2.11.4 CLREX
2.11.5 NOP-compatible hints
ARM DDI 0301H
ID012310
ClearExclusiveLocal(processor_id)
Figure 2-17 shows the format of the Clear Exclusive, CLREX, instruction.
31 28 27
1111 0 1 0 1
The dummy STREX construct specified in ARMv6 is required for correct system behavior. The
CLREX instruction replaces the dummy STREX instruction.
This operation in unconditional in the ARM instruction set.
Syntax
CLREX
Operation
ClearExclusiveLocal(processor_id)
Figure 2-18 shows the format of the NOP-compatible hint instruction.
31 28 27
Cond 0 0 1 1 0 0 1 0 0 0 0 0
Syntax
Is the condition when the instruction executes. It produces no useful change in
<cond>
functionality, but is provided to ensure disassembly followed by reassembly
always regenerates the original code.
<hint> defaults to zero
hint == 0x0: the instruction is NOP
hint == 0x1: the instruction is YIELD
For all other values, RESERVED, the instruction behaves like NOP.
The true NOP for ARM state is equivalent to an MSR to the CPSR with the
redefined as the hint field and no bytes selected. The instruction is fully architecturally defined,
with all encodings assigned.
Note
True NOPs are architected for alignment reasons and do not have any timing guarantees with
respect to their neighboring instructions.
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21 20 19 16 15
0 1 1 1 SBO SBO
23 22 21 20 19 16 15
SBO

Figure 2-18 NOP-compatible hint instruction

Programmer's Model
12 11 8 7 4 3
SBZ 0 0 0 1

Figure 2-17 CLREX instruction

12 11 8 7
0 0 0 0 Hint
immed_value
0
SBO
0
2-34