Coprocessor Interface - ARM ARM1176JZF-S Technical Reference Manual

1.5.6

Coprocessor interface

1.5.7 Debug
ARM DDI 0301H
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Write buffer
All memory writes take place through the write buffer. The write buffer decouples the CPU
pipeline from the system bus for external memory writes. Memory reads are checked for
dependency against the write buffer contents.
Peripheral port
The peripheral port is a 32-bit AMBA AXI interface that provides direct access to local,
Non-shared devices separately. The peripheral port does not use the main bus system. The
memory regions that these non-shared devices use are marked as Device and Non-Shared.
Accesses to these memory regions are routed to the peripheral port instead of to the data
read-write ports.
See Chapter 8 Level Two Interface for more details.
The ARM1176JZF-S processor connects to external coprocessors through the coprocessor
interface. This interface supports all ARM coprocessor instructions:
• LDC
• LDCL
• STC
• STCL
• MRC
• MRRC
• MCR
• MCRR
• CDP.
The memory system returns data for all loads to coprocessors in the order of the accesses in the
program. The processor suppresses HUM operation of the cache for coprocessor instructions.
The external coprocessor interface relies on the coprocessor executing all its instructions in
order.
Externally-connected coprocessors follow the early stages of the core pipeline to permit the
exchange of instructions and data between the two pipelines. The coprocessor runs one pipeline
stage behind the core pipeline.
To prevent the coprocessor interface introducing critical paths, wait states can be inserted in
external coprocessor operations. These wait states enable critical signals to be retimed.
The VFP unit connects to the internal coprocessor interface that has different timings and
behavior, using controlled delays for internal interconnections.
Chapter 11 Coprocessor Interface describes the interface for on-chip coprocessors such as
floating-point or other application-specific hardware acceleration units.
The ARM1176JZF-S core implements the ARMv6.1 Debug architecture that includes
extensions of the ARMv6 Debug architecture to support TrustZone. It introduces three levels of
debug:
• debug everywhere
• debug in Non-secure privileged and user, and Secure user
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