Table 3-75 Cache Operations Flush Functions; Table 3-76 Flush Branch Target Entry Using Mva Bit Functions; Figure 3-44 C7 Format For Flush Branch Target Entry Using Mva - ARM ARM1176JZF-S Technical Reference Manual

ARM DDI 0301H
ID012310
Flush operations
Table 3-75 lists the flush operations and instructions available through c7.
Instruction
MCR p15, 0, <Rd>, c7, c5, 4
MCR p15, 0, <Rd>, c7, c5, 6
MCR p15, 0, <Rd>, c7, c5, 7
a. These operations are accessible in both User and privileged modes of operation. All
other operations are only accessible in privileged modes of operation.
b. This operation is accessible in both Privileged and User modes of operation when in
Debug state.
c. The range of MVA bits used in this function is different to the range of bits used in other
functions that have MVA data.
The Flush Branch Target Entry using MVA operation uses a different MVA format to that used
by Clean and Invalidate operations. Figure 3-44 shows the MVA format for the Flush Branch
Target Entry operation.
31
Table 3-76 lists how the bit values correspond with the Flush Branch Target Entry using MVA
functions.
Note
The MVA does not have to be cache line aligned.
Flushing the prefetch buffer has the effect that all instructions occurring in program order after
this instruction are fetched from the memory system after the execution of this instruction,
including the level one cache or TCM. This operation is useful for ensuring the correct execution
of self-modifying code. See Explicit Memory Barriers on page 6-25.
VA to PA translation operations
The purpose of the VA to PA translation operations is to provide a Secure means to determine
address translation in the Secure and Non-secure worlds and for address translation between the
Secure and Non-secure worlds. VA to PA translations operate through:
• PA Register on page 3-80
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Table 3-75 Cache operations flush functions

Data
SBZ
SBZ
c
MVA
MVA

Figure 3-44 c7 format for Flush Branch Target Entry using MVA

Table 3-76 Flush Branch Target Entry using MVA bit functions

Bits Field name Function
[31:3] MVA Specifies address to flush.
Holds the MVA of the Branch Target Cache line.
[2:0] - SBZ.
System Control Coprocessor
Function
a
Flush Prefetch Buffer .
Flush Entire Branch Target Cache
Flush Branch Target Cache Entry with MVA.
b
.
3 2 0
SBZ
3-79