Figure 1-5 Typical Multiply Operation - ARM ARM1176JZF-S Technical Reference Manual

Fe1
1st fetch
stage
ARM DDI 0301H
ID012310
Fe2 De
Register
2nd fetch Instruction read and
stage decode instruction
issue
Common decode pipeline
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Ex1 Ex2
Sh ALU
Not used Not used
Iss
MAC1 MAC2
1st 2nd
multiply multiply
stage stage
ADD DC1
Not used Not used
Not used
Ex3
Sat
Not used
WBex
Base
register
MAC3
writeback
3rd
multiply
stage
DC2 WBls
Not used Not used

Figure 1-5 Typical multiply operation

Introduction
ALU
pipeline
Multiply
pipeline
Load/store
pipeline
Hit under
miss
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