Table 3-77 Pa Register For Successful Translation Bit Functions; Figure 3-45 Pa Register Format For Successful Translation; Figure 3-46 Pa Register Format For Aborted Translation - ARM ARM1176JZF-S Technical Reference Manual

ARM DDI 0301H
ID012310
• VA to PA translation in the current world on page 3-82
• VA to PA translation in the other world on page 3-83.
PA Register
The purpose of the PA Register is to hold:
• the PA after a successful translation
• the source of the abort for an unsuccessful translation.
Table 3-77 lists the purpose of the bits of the PA Register for successful translations and
Table 3-78 on page 3-81 lists the purpose of the bits of the PA Register for unsuccessful
translations.
The PA Register is:
• in CP15 c7
• a 32 bit read/write register banked in Secure and Non-secure worlds
• accessible in privileged modes only.
Figure 3-45 shows the format of the PA Register for successful translations.
31
Figure 3-46 shows the format of the PA register for aborted translations.
31
Table 3-77 lists the functional bits of the PA Register for successful translation.
Bits Field name
[31:10] PA
[9] NS
[8] P
[7] SH
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PA

Figure 3-45 PA Register format for successful translation

UNP / SBZ

Figure 3-46 PA Register format for aborted translation

Table 3-77 PA Register for successful translation bit functions

Function
PA Translated physical address.
Indicates the state of the NS Attribute bit in the page table:
0 = Secure memory
1 = Non-secure memory.
Not used in the ARM1176JZF-S processor.
UNP/SBZ.
Indicates shareable memory:
0 = Non-shared
1 = Shared.
System Control Coprocessor
10 9 8 7 6 5 4 3 2 1 0
N S
P
S H
INNER OUTER
7 6
FSR[12,10,3:0]
- 0
1 0
1
3-80