Table 6-14 Access Types From First-Level Descriptor Bit Values - ARM ARM1176JZF-S Technical Reference Manual

6.12.2 First-level descriptor
ARM DDI 0301H
ID012310
Using the first-level descriptor address, a request is made to external memory. This returns the
first-level descriptor. By examining bits [1:0] of the first-level descriptor, the access type is
indicated as Table 6-14 lists.
First-level translation fault
If bits [1:0] of the first-level descriptor are b00 or b11, a translation fault is generated. This
generates an abort to the processor, either a Prefetch Abort for the instruction side or a Data
Abort for the data side, see MMU fault checking on page 6-29.
If the first level descriptor describes a section or supersection when the Force AP bit is set and
the MMU is in ARMv6 mode, Access bit faults might be generated if AP[0]=0.
First-level page table address
If bits [1:0] of the first-level descriptor are b01, then a page table walk is required. Second-level
page table walk on page 6-47 describes this process.
First-level section base address
If bits [1:0] of the first-level descriptor are b10, a request to a section memory block has
occurred. Figure 6-11 on page 6-46 shows the translation process for a 1MB section using
ARMv6 format, AP bits disabled.
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Table 6-14 Access types from first-level descriptor bit values

Bit values
b00
b01
b10
b11
Memory Management Unit
Access type
Translation fault
Page table base address
Section base address
Reserved, results in translation fault
6-45