ARM ARM1176JZF-S Technical Reference Manual page 83

Register
Instruction/Unified TCM
Non-secure Control Access
Register
Data TCM Region Registers
Instruction/Unified TCM Region
Registers
Secure Primary Region Remap
Register
Secure Normal Memory Remap
Register
Secure Vector Base Register
Monitor Vector Base Register
Secure FCSE Register
Peripheral Port remap Register
Instruction Cache master valid
register
Data Cache master valid register
TLB lockdown Index register
TLB lockdown VA register
TLB lockdown PA register
TLB lockdown Attribute register
Validation registers
2.2.4 Secure Monitor bus
ARM DDI 0301H
ID012310
Table 2-1 Write access behavior for system control processor registers (continued)
Instruction that is Undefined
when CP15SDISABLE=1
MCR p15, 0, Rd, c9, c1, 3
MCR p15, 0, Rd, c9, c1, 0
MCR p15, 0, Rd, c9, c1, 1
MCR p15, 0, Rd, c10, c2, 0
MCR p15, 0, Rd, c10, c2, 1
MCR p15, 0, Rd, c12, c0, 0
MCR p15, 0, Rd, c12, c0, 1
MCR p15, 0, Rd, c13, c0, 0
MCR p15, 0, Rd, c15, c2, 4
MCR p15, 3, Rd, c15, c8, {0-7}
MCR p15, 3, Rd, c15, c12, {0-7}
MCR p15, 5, Rd, c15, c4, 2
MCR p15, 5, Rd, c15, c5, 2
MCR p15, 5, Rd, c15, c6, 2
MCR p15, 5, Rd, c15, c7, 2
MCR p15, 0, Rd, c15, c9, 0
MCR p15, 0, Rd, c15, c12, {4-7}
MCR p15, 0, Rd, c15, c14, 0
MCR p15, {0-7}, Rd, c15, c13, {0-7}
The SECMONBUS exports a set of signals from the core for use in a monitoring block inside
the chip.
Caution
Implementors must ensure that the SECMONBUS signals do not compromise the security of
the processor. The signals provide information for a security monitoring block, that is inside the
SoC, and must not appear outside the chip.
Table 2-2 on page 2-11 lists the signals that appear on the Secure Monitor bus SECMONBUS.
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Non-Confidential, Unrestricted Access
Programmer's Model
Security Condition
Secure Monitor or Privileged when NS=0
All TCM Base Registers for which the
Data TCM Non-secure Control Access
Register = 0
All TCM Base Registers for which the
Instruction/Unified TCM Non-secure
Control Access Register = 0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
Secure Monitor or Privileged when NS=0
2-10