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18.8
VFP11 treatment of branch instructions
ARM DDI 0301H
ID012310
The VFP11 coprocessor does not directly provide branch instructions. Instead, the result of a
floating-point compare instruction can be stored in the ARM11 condition code flags using the
FMSTAT instruction. This enables you to use the ARM11 branch instructions and conditional
execution capabilities to executing conditional floating-point code.
In some cases, full IEEE 754 standard comparisons are not required. Simple comparisons of
single-precision data, such as comparisons to zero or to a constant, can be done using an FMRS
transfer and the ARM11 CMP and CMN instructions. This method is faster in many cases than
using an FCMP instruction followed by an FMSTAT instruction. For more information, see
Compliance with the IEEE 754 standard on page 20-3 and Comparisons on page 20-5.
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Introduction to the VFP coprocessor
18-15
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