Table 6-2 Tex Field, And C And B Bit Encodings Used In Page Table Formats - ARM ARM1176JZF-S Technical Reference Manual

ARM DDI 0301H
ID012310
The S bit in the descriptors only applies to Normal, that is not Device and not Strongly Ordered
memory. Table 6-2 summarizes the TEX[2:0], C, and B encodings used in the page table
formats, and the value of the shareable attribute of the concerned page:

Table 6-2 TEX field, and C and B bit encodings used in page table formats

Page table encodings
TEX C B
b000 0 0
b000 0 1
b000 1 0
b000 1 1
b001 0 0
b001 0 1
b001 1 0
b001 1 1
b010 0 0
b010 0 1
010 1 X
011 X X
1BB A A
a. Shared, regardless of the value of the S bit in the page table.
b. s is Shared if the value of the S bit in the page table is 1, or Non-shared if the value of the S bit is 0 or not
present.
c. The cache does not implement allocate on write.
The Inner and Outer cache policy bits control the operation of memory accesses to the external
memory:
• The C and B bits are described as the AA bits and define the Inner cache policy
• The TEX[1:0] bits are described as the BB bits and define the Outer cache policy.
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Description
Strongly Ordered
Shared Device
Outer and Inner Write-Through,
No Allocate on Write
Outer and Inner Write-Back,
No Allocate on Write
Outer and Inner Noncacheable
Reserved
Reserved
Outer and Inner Write-Back,
c
Allocate on Write
Non-Shared Device
Reserved
Reserved
Reserved
Cached memory.
BB = Outer policy,
AA = Inner policy.
See Table 6-3 on page 6-16.
Memory Management Unit
Memory type Page shareable?
Strongly Ordered a
Shared
Device a
Shared
Normal b
s
Normal b
s
Normal b
s
- -
- -
Normal b
s
Device Non-shared
- -
- -
- -
Normal b
s
6-15