ARM ARM1176JZF-S Technical Reference Manual page 563

14.8.14 Writing memory as words
ARM DDI 0301H
ID012310
3. This loop keeps on reading words, but it stops before the latest read. It is skipped if there
is only one word to read:
FOR(i=1; i <= (Words2Read-1); i++) DO
LOOP
DATA 0x00000000 Ready readData
RTI
UNTIL Ready==1
Save value in readData
ENDFOR
4. Wait for the last read to finish:
LOOP
DATA 0x00000000 Ready readData
UNTIL Ready==1
Save value in readData
5. Now check whether an abort occurred:
SCAN_N 1
INTEST
DATAOUT DSCR
6. Scan out the contents of the DSCR. This clears the sticky precise Data Abort and sticky
imprecise Data Abort flags. If the sticky precise Data Abort is set, this means that during
the sequence one of the instructions caused a precise Data Abort. All the instructions that
follow are not executed. Register R0 points to the next word to be written, and after the
cause for the abort has been fixed the sequences resumes at step 1.
Note
If the sticky imprecise Data Aborts flag is set, an imprecise Data Abort has occurred and
the sequence restarts at step 1 after the cause of the abort is fixed and R0 is reloaded.
This sequence is optimized for a long sequential write. This sequence assumes that R0 has been
set to the address to store data to prior to running this sequence. Register R0 is post-incremented
so that it can be used by successive writes to memory:
1. The instruction is loaded:
SCAN_N 5
ITRSEL
INST STC p14,c5,[R0],#4
EXTEST
2. This loop writes all the words:
FOR (i=1; i <= Words2Write; i++) DO
LOOP
DATA Data2Write Ready
RTI
UNTIL Ready==1
ENDFOR
INTEST
3. Wait for the last write to finish:
LOOP
DATA 0x00000000 Ready
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; gets the result of
; the previous read
; issues the next read
; wait until the instruction ends
; wait until instruction ends
; select DSCR
; this action clears the DSCR[6] flag
; select DTR
; select the ITR and EXTEST
; store the contents of rDTR into the
; position of memory pointed by R0 and
; increment it by 4
; select the DTR and EXTEST
; wait until instruction ends
; deselect the DTR
Debug Test Access Port
14-37