ARM Cortex-A35 Manuals

Manuals and User Guides for ARM Cortex-A35. We have 1 ARM Cortex-A35 manual available for free PDF download: Technical Reference Manual

ARM Cortex-A35 Technical Reference Manual

ARM Cortex-A35 Technical Reference Manual (894 pages)

Brand: ARM | Category: Computer Hardware | Size: 3 MB

Table of Contents

Table of Contents
5
Preface

19
- About this Book
  20
- Feedback
  25
Part a Functional Description

27
- Chapter A1
  
  29
Introduction

29
- A1.1 about the Cortex ® -A35 Processor
  29
- A1.2 Features
  31
- A1.3 Implementation Options
  32
- Supported Standards and Specifications
  34
- A1.5 Test Features
  35
- A1.6 Design Tasks
  36
- A1.7 Product Revisions
  37
- Chapter A2
  
  39
Technical Overview

39
- A2.1 Components
  40
- A2.2 Interfaces
  44
- C4.1 about the Cross-Trigger
  45
- A2.3 about System Control
  46
- A2.4 about the Generic Timer
  47
- A2.5 about the Memory Model
  48
Chapter A3

49
Clocks, Resets, and Input Synchronization

49
- A3.1 Clocks
  50
- A3.2 Input Synchronization
  51
- A3.3 Resets
  52
Chapter A4

57
Power Management

57
Chapter A5

77
Cache Behavior and Cache Protection

77
Chapter A6

89
L1 Memory System

89
Chapter A7

97
L2 Memory System

97
AXI Master Interface

105
- A8.1 about the AXI Master Interface
  106
- A8.2 AXI Privilege Information
  107
- A8.3 AXI Transactions
  108
- Attributes of the AXI Master Interface
  110
- Chapter A9
  
  113
ACE Master Interface

113
- A9.1 about the ACE Master Interface
  114
- A9.2 ACE Configurations
  115
- A9.3 ACE Privilege Information
  116
- A9.4 ACE Transactions
  117
- Attributes of the ACE Master Interface
  120
- Snoop Channel Properties
  122
- A9.7 AXI Compatibility Mode
  123
- Chapter A10
  
  125
  - A10.1 about the CHI Master Interface
    126
  - A10.2 CHI Configurations
    127
  - A10.3 Attributes of the CHI Master Interface
    128
  - A10.4 CHI Channel Properties
    130
  - A10.5 CHI Transactions
    131
- Chapter A11
  
  135
ACP Slave Interface

135
- A11.1 about the ACP
  136
- A11.2 Transfer Size Support
  137
- A11.3 ACP Performance
  138
- A11.4 ACP User Signals
  139
- Chapter A12
  
  141
GIC CPU Interface

141
- A12.1 Bypassing the GIC CPU Interface
  142
- A12.2 Memory Map for the GIC CPU Interface
  143
Part B Register Descriptions

145
- Chapter B1
  
  147
Aarch32 System Registers

147

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