Fault Status And Address; Table 6-11 Fault Status Register Encoding - ARM ARM1176JZF-S Technical Reference Manual

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6.10

Fault status and address

Priority
Sources
Highest
Alignment
TLB miss
Instruction cache maintenance
operation fault
External abort on translation
Translation
Access Bit Fault, Force AP only
Domain
Permission
Precise external abort
Imprecise external abort
Parity error exception, not supported
Lowest
Instruction debug event
a. These aborts cannot be signaled with the IFSR because they do not occur on the instruction side.
ARM DDI 0301H
ID012310
Table 6-11 lists the encodings for the Fault Status Register.
a
Note
All other Fault Status encodings are reserved.
If a translation abort occurs during a Data Cache maintenance operation by virtual address, then
a Data Abort is taken and the DFSR indicates the reason. The FAR indicates the faulting address,
and the IFAR indicates the address of the instruction causing the abort.
If a translation abort occurs during an Instruction Cache maintenance operation by virtual
address, then a Data Abort is taken, and an Instruction Cache Maintenance Operation Fault is
indicated in the DFSR. The IFSR indicates the reason. The FAR indicates the faulting address,
and the IFAR indicates the address of the instruction causing the abort.
Domain and fault address information is only available for data accesses. For instruction aborts
R14 must be used to determine the faulting address. You can determine the domain information
by performing a TLB lookup for the faulting address and extracting the domain field.
Table 6-12 on page 6-35 lists a summary of the abort vector that is taken, and the Fault Status
and Fault Address Registers that are updated for each abort type.
Copyright © 2004-2009 ARM Limited. All rights reserved.
Non-Confidential, Unrestricted Access

Table 6-11 Fault Status Register encoding

FSR[10,3:0]
b00001
b00000
b00100
first-level
b01100
second-level
b01110
Section
b00101
Page
b00111
Section
b00011
Page
b00110
Section
b01001
Page
b01011
Section
b01101
Page
b01111
b01000
b10110
b11000
b00010
Memory Management Unit
Domain
FSR[12]
Invalid
SBZ
Invalid
SBZ
Invalid
SBZ
Invalid
SLVERR !DECERR
Valid
SLVERR !DECERR
Invalid
SBZ
Valid
SBZ
Valid
SBZ
Valid
SBZ
Valid
SBZ
Valid
SBZ
Valid
SBZ
Valid
SBZ
Valid
SLVERR !DECERR
Invalid
SLVERR !DECERR
Invalid
SBZ
Valid
SBZ
6-34

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