Table 20-4 Accessing Vfp11 System Registers; Figure 20-5 Floating-Point System Id Register - ARM ARM1176JZF-S Technical Reference Manual

Register
FPSID
FPSCR
FPEXC
FPINST
FPINST2
MVFR0
MVFR1
a. An instruction that tries to access FPSCR while the VFP11 coprocessor is disabled takes the Undefined Instruction trap.
20.4.1 Floating-Point System ID Register, FPSID
ARM DDI 0301H
ID012310
Table 20-4 lists the ARM11 processor modes for accessing the VFP11 system registers.
FMXR/FMRX <reg> field
b0000
b0001
b1000
b1001
b1010
b0111
b0110
Table 20-4 shows that a privileged ARM11 mode is sometimes required to access a VFP11
system register. When a privileged mode is required, an instruction that tries to access a register
in a nonprivileged mode takes the Undefined Instruction trap.
The following sections describe the VFP11 system registers:
• Floating-Point System ID Register, FPSID
• Floating-Point Status and Control Register, FPSCR on page 20-14
• Floating-point exception register, FPEXC on page 20-16
• Instruction registers, FPINST and FPINST2 on page 20-18.
FPSID is a read-only register that identifies the VFP11 coprocessor. Figure 20-5 shows the
FPSID bit fields.
31 24 23
Implementer
SW
Format
SNG
Architecture
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Table 20-4 Accessing VFP11 system registers

ARM11 processor mode
VFP11 coprocessor enabled
Any mode
Any mode
Privileged mode
Privileged mode
Privileged mode
Any mode
Any mode
22 21 20 19 16 15
Part number

Figure 20-5 Floating-Point System ID Register

VFP Programmer's Model
VFP11 coprocessor disabled
Privileged mode
a
None
Privileged mode
Privileged mode
Privileged mode
Privileged mode
Privileged mode
8 7 4 3
Variant Revision
0
20-13