Processor Operating States - ARM ARM1176JZF-S Technical Reference Manual

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2.3

Processor operating states

2.3.1
Switching state
2.3.2
Interworking ARM and Thumb state
ARM DDI 0301H
ID012310
The processor has these operating states:
ARM state
32-bit, word-aligned ARM instructions are executed in this state.
Thumb state
16-bit, halfword-aligned Thumb instructions.
Jazelle state
Variable length, byte-aligned Java instructions.
In Thumb state, the Program Counter (PC) uses bit 1 to select between alternate halfwords. In
Jazelle state, all instruction fetches are in words.
Note
Transition between ARM and Thumb states does not affect the processor mode or the register
contents. For details on entering and exiting Jazelle state see Jazelle V1 Architecture Reference
Manual.
You can switch the operating state of the processor between:
ARM state and Thumb state using the BX and BLX instructions, and loads to the PC. The
ARM Architecture Reference Manual describes the switching state.
ARM state and Jazelle state using the BXJ instruction.
All exceptions are entered, handled, and exited in ARM state. If an exception occurs in Thumb
state or Jazelle state, the processor reverts to ARM state. Exception return instructions restore
the SPSR to the CPSR, that can also cause a transition back to Thumb state or Jazelle state.
The processor enables you to mix ARM and Thumb code. For details see the chapter about
interworking ARM and Thumb in the RealView Compilation Tools Developer Guide.
Copyright © 2004-2009 ARM Limited. All rights reserved.
Non-Confidential, Unrestricted Access
Programmer's Model
2-12

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