Table 8-36 Noncacheable Ldm10; Table 8-37 Noncacheable Ldm11 - ARM ARM1176JZF-S Technical Reference Manual

Table of Contents

Advertisement

8.5.13
Noncacheable LDM10
8.5.14
Noncacheable LDM11
ARM DDI 0301H
ID012310
A Noncacheable LDM10 is split into two or three operations as shown in Table 8-36.
A Noncacheable LDM11 is split into two or three operations as shown in Table 8-37.
Copyright © 2004-2009 ARM Limited. All rights reserved.
Non-Confidential, Unrestricted Access
Table 8-35 Noncacheable LDM9 (continued)
Address[4:0]
, word 5
0x14
, word 6
0x18
, word 7
0x1C
Address[4:0]
Operations
0x00
, word 0
LDM8 from
0x04
, word 1
LDM7 from
0x08
, word 2
LDM6 from
0x0C
, word 3
LDM5 from
0x10
, word 4
LDM4 from
, word 5
LDM3 from
0x14
, word 6
LDM2 from
0x18
, word 7
LDR from
0x1C
Address[4:0]
Operations
, word 0
LDM8 from
0x00
0x04
, word 1
LDM7 from
0x08
, word 2
LDM6 from
0x0C
, word 3
LDM5 from
0x10
, word 4
LDM4 from
0x14
, word 5
LDM3 from
0x18
, word 6
LDM2 from
, word 7
LDR from
0x1C
Level Two Interface
Operations
LDM3 from
+ LDM6 from
0x14
LDM2 from
+ LDM7 from
0x18
LDR from
+ LDM8 from
0x1C

Table 8-36 Noncacheable LDM10

0x00
+ LDM2 from
0x00
0x04
+ LDM3 from
0x00
0x08
+ LDM4 from
0x00
0x0C
+ LDM5 from
0x00
0x10
+ LDM6 from
0x00
+ LDM7 from
0x14
0x00
+ LDM8 from
0x18
0x00
+ LDM8 from
+ LDR from
0x1C
0x00

Table 8-37 Noncacheable LDM11

+ LDM3 from
0x00
0x00
0x04
+ LDM4 from
0x00
0x08
+ LDM5 from
0x00
0x0C
+ LDM6 from
0x00
0x10
+ LDM7 from
0x00
0x14
+ LDM8 from
0x00
0x18
+ LDM8 from
0x00
+ LDR from
+ LDM8 from
+ LDM2 from
0x1C
0x00
0x00
0x00
0x00
0x00
0x00
0x00
8-23

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents