ARM ARM1176JZF-S Technical Reference Manual page 71

Operation
Compare
Logical
Shift/Rotate
Branch
Load
ARM DDI 0301H
ID012310
Negate
Multiply
Compare immediate
Compare LowReg and LowReg, update flags
Compare LowReg and HighReg, update flags
Compare HighReg and LowReg, update flags
Compare HighReg and HighReg, update flags
Compare negative
AND
XOR
OR
Bit clear
Move NOT
Test bits
Logical shift left
Logical shift right
Arithmetic shift right
Rotate right
Conditional
Unconditional
Branch with link
Branch, link and exchange
Branch, link and exchange
Branch and exchange
With immediate offset
Word
Halfword
Byte
With register offset
Word
Halfword
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Table 1-16 Thumb instruction set summary (continued)
Introduction
Assembler
NEG <Rd>, <Rm>
MUL <Rd>, <Rm>
CMP <Rn>, #<immed_8>
CMP <Rn>, <Rm>
CMP <Rn>, <Rm>
CMP <Rn>, <Rm>
CMP <Rn>, <Rm>
CMN <Rn>, <Rm>
AND <Rd>, <Rm>
EOR <Rd>, <Rm>
ORR <Rd>, <Rm>
BIC <Rd>, <Rm>
MVN <Rd>, <Rm>
TST <Rd>, <Rm>
LSL <Rd>, <Rm>, #<immed_5>
LSL <Rd>, <Rs>
LSR <Rd>, <Rm>, #<immed_5>
LSR <Rd>, <Rs>
ASR <Rd>, <Rm>, #<immed_5>
ASR <Rd>, <Rs>
ROR <Rd>, <Rs>
B{cond} <label>
B <label>
BL <label>
BLX <label>
BLX <Rm>
BX <Rm>
-
LDR <Rd>, [<Rn>, #<immed_5*4>]
LDRH <Rd>, [<Rn>, #<immed_5*2>]
LDRB <Rd>, [<Rn>, #<immed_5>]
-
LDR <Rd>, [<Rn>, <Rm>]
LDRH <Rd>, [<Rn>, <Rm>]
1-45