Figure 2-3 Memory Partition In The Secure And Non-Secure Worlds - ARM ARM1176JZF-S Technical Reference Manual

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Non-secure
Virtual memory
ARM DDI 0301H
ID012310
The virtual memory address map for the Secure and Non-secure worlds appear as separate
blocks. Figure 2-3 shows how the Secure and Non-secure virtual address spaces might map onto
the physical address space. In this example:
Non-secure descriptors are stored in Non-secure memory and can only target Non-secure
memory
Secure descriptors are stored in Secure memory and can target both Secure and
Non-secure memory.
Non-secure translation
table base address
Secure translation
table base address

Figure 2-3 Memory partition in the Secure and Non-secure worlds

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Physical memory
Non-secure level
1 descriptors
4KB non-secure
4KB non-secure
4KB non-secure
4KB non-secure
4KB non-secure
4KB secure
4KB secure
4KB secure
Secure level 1
descriptors
Non-secure
SDRAM
Secure
peripherals
Non-secure
peripherals
Programmer's Model
Non-secure level 1
descriptors
1MB sections
Non-secure level 2
descriptors
4KB small pages
Secure level 1
descriptors
attribute
1MB sections
Secure level 2
descriptors
4KB small pages
NS
2-7

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