Table 3-9 Priority Encoding Of Fault Status - ARM ARM926EJ-S Technical Reference Manual

Memory Management Unit
3-22
Fault status register (FSR)
Table 3-9 shows the various access permissions and controls supported by the data
MMU, and how these are interpreted to generate faults.
Priority Source
Highest Alignment
External abort on translation
Translation
Domain
Permission
Lowest External abort
Note
Alignment faults can write either b0001 or b0011 into FSR[3:0].
Invalid values can occur in the status bit encoding for domain faults. This happens when
the fault is raised before a valid domain field has been read from a page table
description.
Aborts masked by a higher priority abort can be regenerated by fixing the cause of the
higher priority abort, and repeating the access.
Alignment faults are not possible for instruction fetches.
The instruction FSR can also be updated for instruction prefetch operations
(
MCR p15,0,<Rd>,c7,c13,1
Copyright © 2001-2003 ARM Limited. All rights reserved.

Table 3-9 Priority encoding of fault status

).
Size Status
- b00x1
First level b1100
Second level b1110
Section b0101
Page b0111
Section b1001
Page b1011
Section b1101
Page b1111
Section or page b10x0
ARM DDI0198D
Domain
Invalid
Invalid
Valid
Invalid
Valid
Valid
Valid
Valid
Valid
Invalid